The present invention relates to a microcomputer, and more particularly to a microcomputer provided with a device for controlling the switching of tasks when a main program is processed.
The interrupt processing procedure for a microcomputer relevant to the present invention is described hereinbelow.
As shown in FIG. 5, when a reception 12 of an interrupt is made while a program 11 is being processed, an interrupt receiving process 13 is started. In the interrupt receiving process 13, a program status word (hereinafter referred to as PSW) indicating status of a main program which includes flag information is first reserved. This PSW is reserved in a rewritable memory indicated by a stack pointer (hereinafter referred to as SP). Further, information of a program counter (hereinafter referred to as PC) of the main program is reserved in a stack. Subsequently, for assigning a program to be processed by the interrupt, vector information indicating which interrupt requirement is read from a program memory and stored in the PC.
After such an interrupt receiving process 13 has been completed, a register saving process 14 is carried out. In the process 14, the content of a register used immediately before the interrupt reception during the main program process 11 is stored in another rewritable memory. Thereafter, a regular interrupt process 15 is executed.
Upon completion of the interrupt process 15, a return process 16 to the main program is carried out. In this return process 16, the content of the register which has been saved in the rewritable memory is again returned to and stored in the register.
Subsequently, an interrupt return process 17 reads PC information and PSW information of the main program stored in the stack. The thus read PSW information is written into PSW without modification whereas the PC information is written into PC. Thereby, the return to the main program 18 which has been executed at the time of reception of the interrupt process is effected.
However, the above-described microcomputer has the following problems. In the case where the interrupt process is carried out, a process for saving the register used in the main program to the memory as described above is required. Normally, there is a plurality of registers, and time is needed for reserving the data stored in all registers. Furthermore, the memory for storing the data comprises a rewritable memory. Normally, a data RAM is used. Since it takes time for the writing into the data RAM, it also takes time for the storage.
Moreover, in order to return to the main program after completion of the interrupt process, it is necessary to have the return process for restoring the content of the register which has been saved in the rewritable memory to the register. As mentioned above, the register saving and return processes become necessary for relatively every interrupt. The proportion of this processing relative to the whole interrupt process tends to increase as the number of registers increases. In the past, the saving and return process of the register have been carried out by executing a command from a CPU.
As a result, much time is taken to switch the tasks upon interrupt so that it becomes difficult to construct a system suitable for real time processing. Such a problem likewise occurs not only in the interrupt process but in the case of shifting from a main program to a subroutine program.